(1) Field of the Invention
The present invention relates to an organic transistor prepared through a printing process; and a method for fabricating the same.
(2) Description of the Related Art
Thin-film transistors (TFTs) using amorphous silicon or polycrystalline silicon as channels have been used as elements for driving picture elements in thin display devices using organic electroluminescence elements or liquid crystals. These TFTs using amorphous silicon or polycrystalline silicon are difficult to have plasticity or flexibility, and they require vacuum facilities in their fabrication process, thus generally having high fabrication costs. Accordingly, a wide variety of investigations has been made to provide TFTs for use in driving circuits which are composed of organic materials in order to provide flexible display devices and to fabricate such devices at low costs.
Such organic thin-film transistors (organic TFTs) are expected to be fabricated at remarkably lower costs than TFTs using inorganic semiconductors, because organic semiconductor layers constituting channels can be formed according to a simple and convenient process such as a coating process, a printing process, a spraying process, or an ink-jet process in the organic TFTs. In addition, they are expected to be applied typically to liquid crystal displays, organic electroluminescence (organic EL) displays, and chip cards (IC cards), because large-screen, lightweight, thin displays and integrated circuits can be easily fabricated by using them.
To provide flexible display devices, other components including peripheral circuits for driving picture elements should also be flexible. TFTs for use in circuits for driving picture elements should have a carrier mobility of about 10 cm2/V.s. It has been demonstrated that TFTs using low-molecular-weight organic molecules as channels satisfy this condition. For example, an organic TFT using a single crystal of rubrene molecule disclosed in Science, 303, 1644(2004) has a carrier mobility of 15 cm2/V.s. A single crystal of highly purified pentacene reported in Applied Physics Letters, 84, 3061(2004) has a carrier mobility of 35 cm2/V.s at room temperature.
However, although easily having improved performance, organic TFTs composed of low-molecular-weight molecules are disadvantageous in fabrication, because TFTs of this type are generally fabricated through vacuum vapor deposition. In contrast, TFTs composed of polymeric molecules can be fabricated at lower costs but they have remarkably low performance and are limited in their applications.
As a possible solution to these problems, there has been proposed a technique of forming a semiconductor layer of a channel by dissolving a low-molecular-weight compound in a solvent to form a solution and applying the solution. Pentacene is a most representative organic compound to be applied as a low-molecular-weight compound to a TFT, and pentacene will be taken as an example hereinbelow. For example, there is a technique of synthetically preparing a pentacene derivative having an increased solubility in a solvent, dissolving the pentacene derivative in the solvent to form a solution, and applying the solution to form a thin film. This technique is reported in Journal of Applied Physics, 79, 2136(1996) and Journal of American Chemical Society, 124, 8812(2002). A technique for forming a thin film of pentacene is described in Synthetic Metals, 153, 1(2005). According to this technique, pentacene is directly dissolved in a solvent to form a solution, and the solution is applied to form a thin film of pentacene. In addition, procedural steps for dissolving pentacene molecule in an organic solvent are described in Applied Physics Letters, 84, 3061 (2004) and Japanese Journal of Applied Physics, 43, 2B, L315 (2004).
It is also desirable to form not only organic semiconductors but also electrodes and interconnections composed of metallic wires by application (printing), for fabricating organic FETs by printing at low costs. As a possible solution to this, there is a technique for forming metallic interconnections and electrodes by preparing fine particles of a metal, covering the fine particles typically with an organic material so as to increase solubility of the fine particles in a solvent, dissolving the coated fine particles in the solvent to form a metallic ink or paste, applying the metallic ink or paste through printing to predetermined portions, removing the organic material through a treatment at a predetermined temperature to thereby form metallic interconnections and electrodes. There has been established a technique for forming interconnections by applying a paste containing fine silver particles or fine gold particles through printing.
On the other hand, complementary metal oxide semiconductor (CMOS) transistors should be employed for the integration of FETs using silicon. These CMOS transistors include two types of FETs, i.e., an n-channel MOS using electron as a carrier for conducting in channel, and a p-channel MOS using hole as a carrier for conducing in channel, in which the n-channel MOS and the p-channel MOS are arranged in series. The CMOS transistors consume less power. However, most of known organic TFTs work only as p-type FETs. Several possible causes thereof have been proposed, but they are still argued. For example, n-channel and p-channel organic FETs are disclosed by way of example in Oyo Butsuri (in Japanese; “Applied Physics”), 74, 9, 1196 (2005). This document discloses an n-type TFT and a p-type TFT composed of different organic semiconductors, but fails to refer to an economically advantageous process, and fails to indicate the principle and inspection to constitute an n-type TFT and a p-type TFT respectively.
Japanese Patent Application Laid-Open Publication No. 2004-55654 discloses an organic semiconductor device including source/drain electrodes composed of materials having different work functions. Patent Document 1 describes that a material for the source electrode for use in a p-type organic semiconductor device is preferably one having a large work function; and that a material for the drain electrode is preferably one having a work function smaller than that of the source electrode. Examples of a material having a larger work function include metals such as gold, platinum, palladium, chromium, selenium, and nickel; indium tin oxide (so-called ITO), iridium zinc oxide (so-called IZO), zinc oxide, alloys of these metals, tin oxide, and copper iodide. Examples of a material having a smaller work function include metals such as silver, lead, tin, aluminum, and indium; alkali metals such as lithium; alkaline earth metals such as calcium and magnesium; alloys of these metals; compounds of alkali metals; and compounds of alkaline earth metals.
However, the type of an electrode, i.e., an n-type or p-type is not determined merely by the work function of the electrode, because exchange of a charge and/or screening of a charge generally occurs at the interface between an electrode and an organic semiconductor when the electrode and the organic semiconductor come in contact with each other.
Japanese Patent Application Laid-Open Publication No. 2004-211091 discloses an organic semiconductive polymer for an organic thin-film transistor. This organic semiconductive polymer exhibits both a p-type electric property and an n-type electric property by introducing a unit having a p-type semiconductive property, such as thiophene unit, and a unit having an n-type semiconductive property, such as thiazole unit (thiazole ring) into a principal chain of the polymer. Japanese Patent Application Laid-Open Publication No. 2004-211091 mentions that an organic thin film transistor having a low off-state current and exhibiting both a p-type electric property and an n-type electric property may be provided by using the organic semiconductive polymer. However, the specification (definition) of properties as a bulk does not determine the properties of an organic thin film transistor, because the electron structures of semiconductor at an interface between an electrode and the organic semiconductor and at an interface between an insulator and the organic semiconductor are not determined.
Japanese Patent Application Laid-Open Publication No. 2004-128028 discloses an organic FET using a metal oxide as a semiconductor layer. Examples of the metal oxide include metal oxides which show a high electroconductivity upon shifting from a stoichiometric ratio so as to form an oxygen vacancy or interstitial metal, such as tin oxide, titanium oxide, germanium oxide, copper oxide, silver oxide, indium oxide, thallium oxide, barium titanate, strontium titanate, lanthanum chromate, tungsten oxide, europium oxide, aluminum oxide, and lead chromate; metal oxides which show a highest electroconductivity at a stoichiometric ratio, such as rhenium oxide, titanium oxide, lanthanum titanate, lanthanum nickelate, lanthanum copper oxide, ruthenium copper oxide, strontium iridate, strontium chromate, lithium titanate, iridium oxide, and molybdenum oxide; electroconductive metal oxides such as vanadium oxide, chromium oxide, calcium iron oxide, strontium iron oxide, strontium cobaltate, strontium vanadate, strontium ruthenate, lanthanum cobaltate, and nickel oxide; electroconductive metal oxide bronzes, such as a tungsten bronze, a molybdenum bronze, and a rhenium bronze (MxWO3, MxMoO3, and MxReO3) corresponding to tungsten oxide, molybdenum oxide, and rhenium oxide, respectively, except for containing hydrogen atom, an alkali metal, an alkaline earth metal, or a rare earth metal in a portion at Position A of perovskite structure of the oxide where no atom is present. These metal oxides, however, are used not as electrodes but only as semiconductor materials in this technique.
In addition to these attempts for improvements in semiconductor materials and electrode materials, Physical Review B, 54, 14321 (1996) proposes a technique for reducing a Schottky barrier between an electrode and a semiconductor. According to this technique, an organic self-assembled monolayer is arranged between a regular electrode and an organic semiconductor material; and a potential difference is allowed to occur at the interface therebetween using original electric dipole moments of molecules constituting the materials, so as to reduce the Schottky barrier between the electrode and the semiconductor.
FIGS. 1A, 1B, and 1C illustrate an occupied level 51 of a conduction electron of a metal; an unoccupied level 52 of a conduction electron of the metal; a Fermi level 53 of the metal; a valence band 61 of a semiconductor; and a conduction band 62 of the semiconductor. With reference to FIG. 1A, when a semiconductor and a metal as an electrode are in contact with each other, the Fermi level 53 of the metal electrode (the left view in FIG. 1A) generally stands between the valence band 61 and the conduction band 62 of the semiconductor (the right view in FIG. 1A) in contact with the metal electrode, namely, it stands within the band gap. The larger the difference in levels between the Fermi level 53 and the upper end of the valence band 61 of the semiconductor (in the case of a p-type semiconductor) or the difference between the Fermi level 53 and the lower end of the conduction band 62 of the semiconductor (in the case of an n-type semiconductor) is, the larger the Schottky barrier is and the larger the contact resistance is.
In contrast, when a self-assembled monolayer is formed between a metal and a semiconductor so as to be in contact with the metal and the semiconductor respectively, the self-assembled monolayer effectively acts to yield a potential difference. Thus, a semiconductor, if working as a p-type semiconductor, can work more satisfactorily as a p-type semiconductor, because the electron level of the semiconductor is raised so as to reduce the difference in energy between the Fermi level 53 and the upper end of the valence band 61 of the semiconductor and to facilitate the injection of a hole from the electrode to the semiconductor (FIG. 1B). Alternatively, a semiconductor, if working as an n-type semiconductor, can work more satisfactorily as an n-type semiconductor, because the electron level of the semiconductor is lowered so as to reduce the difference in energy between the Fermi level 53 and the lower end of the conduction band 62 of the semiconductor and to facilitate the injection of an electron from the electrode to the semiconductor (FIG. 1C). The Schottky barrier can be lowered and the contact resistance can be reduced by bringing the electron level of the semiconductor near to the Fermi level of the metal in the above-mentioned manner.
The technique disclosed in Physical Review B, 54, 14321 (1996) carries out a calculation of electronic state of a single molecule and thereby proposes a molecular material which has such an electric dipole moment as to facilitate the injection of a hole from an electrode to a semiconductor efficiently, namely as to reduce the Schottky barrier to a p-type semiconductor. The estimation (calculation) according to this technique, however, may not accurately predict how large potential difference occurs on a surface of an actual electrode, because the estimation does not employ, for example, an effect of charge transfer from an electrode to a molecule when the molecule is actually adsorbed to a surface of a metal constituting the electrode.
In known inorganic FETs using silicon as a base, the type and concentration of a dopant in silicon are spatially controlled through ion implantation. Thus, the contact resistance with an electrode is reduced; the threshold of a gate voltage is controlled; a leakage current is prevented; and the mobility of a channel region is ensured. Doping through ion implantation, however, may not be adopted to organic FETs, because a doping technique to organic semiconductors through ion implantation has not yet been established. In addition, such ion implantation doping technique is remarkably expensive and is not suitable for organic FETs which have value in their low costs. Accordingly, the control technique of semiconductor materials effective for inorganic FETs is not effective and is unsuitable and inapplicable for organic FETs.